Preface: The SmmMemLib[.]c library is part of the EDK II (EFI Development Kit II) project, which is an open-source implementation of the UEFI (Unified Extensible Firmware Interface) and PI (Platform Initialization) specifications. This library is specifically used for memory management within System Management Mode (SMM).

Background: The AMD Ryzen processors do not specifically use the SmmMemLib[.]c library. Instead, AMD provides a set of optimized libraries known as the AMD Optimizing CPU Libraries (AOCL), which are designed for high-performance computing and scientific applications. These libraries include various components like AOCL-BLAS, AOCL-LAPACK, AOCL-FFTW, and more. AMD Optimizing CPU Libraries (AOCL) are a set of numerical libraries optimized for AMD “Zen”-based processors, including EPYCTM , RyzenTM ThreadripperTM , and RyzenTM .

Vulnerability details: Analysis by AMD is that a ring 0 attacker could modify boot service tables to point to their own code, potentially resulting in arbitrary code execution. AMD has released mitigations to address this vulnerability. SMM callout vulnerability within the AmdPlatformRasSspSmm driver could allow a ring 0 attacker to modify boot services handlers, potentially resulting in arbitrary code execution.

Official announcement: Please refer to link for details –
https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7028.html

Preface: In the concept of Industry 4.0, the Internet of Things (IoT) shall be used for the development of so-called smart products.

Background: The GPIO driver provides an interface for user-space applications and kernel modules to access and control the GPIO pins. It abstracts the hardware details, making it easier for developers to write code that interacts with the GPIOs without needing to know the specifics of the underlying hardware.

GPIO pins on hardware are often used in automation. They can be programmed to control various devices and systems, such as:

•       Home automation: Controlling lights, fans, and other appliances.

•       Industrial automation: Managing machinery, sensors, and actuators in manufacturing processes.

•       Robotics: Operating motors, servos, and sensors to control robot movements and actions.

•       IoT (Internet of Things): Connecting and controlling smart devices and sensors.

SCADA (Supervisory Control and Data Acquisition) systems can use GPIO pins. SCADA systems are designed to monitor and control industrial processes and infrastructure, and they often interface with various sensors and actuators. GPIO pins can be used in SCADA systems to:

•       Read digital inputs: Such as switches, sensors, and other binary devices.

•       Control digital outputs: Like relays, LEDs, and other on/off devices.

•       Interface with analog inputs/outputs: Through additional circuitry or modules that convert analog signals to digital and vice versa.

For example, GPIO pins can be used to monitor the status of a machine, control the operation of a valve, or read data from a temperature sensor.

Vulnerability details: Linux Kernel Vulnerability in Xilinx GPIO Locking Mechanism.

Official Announcement – please see the link for details – https://nvd.nist.gov/vuln/detail/CVE-2025-21684

Originally posted by AMD 3^rd Feb 2025

Preface: FIPS 186-5 removes DSA as an approved digital signature algorithm “due to a lack of use by industry and based on academic analyses that observed that implementations of DSA may be vulnerable to attacks if domain parameters are not properly generated.

February 3, 2023 – NIST published Federal Information Processing Standard (FIPS) 186-5, Digital Signature Standard (DSS), along with NIST Special Publication (SP) 800-186, Recommendations for Discrete Logarithm-based Cryptography: Elliptic Curve Domain Parameters.  

Background: The SEV feature relies on elliptic-curve cryptography for its secure key generation, which runs when a VM is launched. The VM initiates the elliptic-curve algorithm by providing points along its NIST (National Institute of Standards and Technology) curve and relaying the data based on the private key of the machine.

Vulnerability details: AMD has received a report from researchers at National Taiwan University detailing cache-based side-channel attacks against Secure Encrypted Virtualization (SEV).

Remedy: AMD recommends software developers employ existing best practices for prime and probe attacks (including constant-time algorithms) and avoid secret-dependent data accesses where appropriate.  AMD also recommends following previously published guidance regarding Spectre type attacks (refer to the link in the reference section below), as it believes the previous guidance remains applicable to mitigate these vulnerabilities.

Office announcement: Please refer to the link for details – https://www.amd.com/en/resources/product-security/bulletin/amd-sb-3010.html

Preface: Sometimes, when a solution is misused or misconfigured, it can use this testing feature as a sword!

Background: AMD SEV (Secure Encrypted Virtualization) is a hardware-based security feature designed to enhance the confidentiality and integrity of virtual machines (VMs) running on AMD EPYC processors. Here are some key points about it:

1. Memory Encryption: SEV encrypts the memory of individual VMs using unique encryption keys. This ensures that neither the hypervisor nor other VMs can access the data of a specific VM.
2. Isolation: SEV creates an isolated execution environment, protecting VMs from potential attacks originating from the hypervisor or other VMs.
3. SEV-SNP (Secure Nested Paging): This is an extension of SEV that adds strong memory integrity protections. It helps prevent malicious hypervisor-based attacks like data replay and memory re-mapping, further enhancing the security of the VMs.
4. Recent Vulnerability: A recent vulnerability (CVE-2024-56161) was discovered in SEV-SNP, which could allow an attacker with local admin privileges to load malicious CPU microcode, compromising the confidentiality and integrity of VMs. AMD has released patches to mitigate this issue.

Vulnerability details: Improper signature verification in AMD CPU ROM microcode patch loader may allow an attacker with local administrator privilege to load malicious CPU microcode resulting in loss of confidentiality and integrity of a confidential guest running under AMD SEV-SNP.

Office announcement: Please refer to the link for details https://www.amd.com/en/resources/product-security/bulletin/amd-sb-3019.html

Preface: instruction cache (I-cache) and a data cache (D-cache)

This is the smallest and fastest type of cache memory. It’s embedded directly into the CPU, allowing it to operate at the same speed as the CPU. The L1 cache is typically divided into two parts: one for storing instructions (L1i) and one for storing data (L1d).

Background: Instruction prefetching can boost execution performance by fetching data before it is needed. The Cortex-X4 core supports the AArch64 prefetch memory instructions, PRFM PLI, into the L1 instruction cache or L2 cache.  These instructions signal to the memory system that memory accesses from a specified address are likely to occur soon. The memory system takes actions that aim to reduce the latency of memory accesses when they occur. The PRFM PLD and PRFM PST instructions perform preloading in the L1 data cache, L2 cache, or L3 cache. PRFM PLD and PRFM PST instructions translate through the Data TLB. The PRFM PLI instruction performs preloading to the L1 instruction cache and L2 cache. Instruction preloading is performed in the background. PRFM PLI instructions translate through the Instruction TLB.

Vulnerability details: An issue has been identified in some Arm-based CPUs that may allow an unprivileged context to trigger a data memory-dependent prefetch engine to fetch the contents of a privileged location (for which it does not have read permission) and consume those contents as an address that is also dereferenced. 

Note that this issue does not affect guest-to-guest and guest-to-hypervisor isolation guarantees. Likewise, in configurations with RME enabled, Granule Protection Checks (GPC) are honoured by the prefetcher. 

Official details: Please refer to the link for details –

https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-7881

https://nvd.nist.gov/vuln/detail/CVE-2024-7881