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Important Security Note – A significant vulnerability (CVE-2026-0047) was historically linked to this method due to a missing permission check. (12th Mar 2026)
Preface: Important Security Note – A significant vulnerability (CVE-2026-0047) was historically linked to this method due to a missing permission check. When modifying or using this method in custom ROM development, always ensure it is wrapped in a checkDumpPermission() call to prevent unauthorized local privilege escalation Background: In the Android system, a standard application cannot…
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When 3I/ATLAS Meets Santa Claus (24th Dec 2025)
Preface: O come, all ye faithful, joyful and triumphant, O come ye, O come ye, to Bethlehem. But this time, 3I/ATLAS’s destination is Jupiter! No worries! Santa Claus is here to see you! Background: Halley’s Comet, the famous periodic comet, last appeared in 1986 and is expected to return to Earth’s vicinity in mid-2061, reaching…
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Is the impact of the CVE-2025-10184 vulnerability not limited to PoC test devices? (25-09-2025)
Preface: The com.android[.]providers[.]telephony and com[.]android[.]phone packages are not similar in function; they serve different and distinct purposes in the Android telephony system. This package (com[.]android[.]providers[.]telephony) is a content provider that manages and provides access to telephony-related data. Background: The Telephony provider and its associated classes like com[.]android[.]providers[.]telephony[.]PushMessageProvider are common in Android smartphones as they are…
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AMD responds to DRAM-related side-channel attacks (24th Sep 2025)
Preface: DDR5 memory has two independent 32-bit sub-channels per DIMM, while DDR4 uses a single 64-bit channel. There are many types of DDR5 DIMMs. Background: DRAM side-channel attacks exploit timing differencesand row buffer behavior in the memory subsystem — particularly row conflicts and row hits — to infer sensitive information. These behaviors are fundamental to…
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Phoenix: Rowhammer Attacks on DDR5 Memory – AMD ID: AMD-SB-7048 (17-09-2025)
Preface: The researchers behind the related “ZenHammer” work found that using traditional timing side-channel methods for synchronization was less reliable on AMD Zen platforms compared to Intel CPUs. The Phoenix attack was designed to overcome these challenges using a “self-correcting” technique. Background: Phoenix attack does not use XOR or similar software-level bit manipulation. Instead, it…
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CVE-2025-21483: About Qualcomm – Enhanced Restriction of Operations within the Bounds of a Memory Buffer
(5th Sep 2025) Official Published: 09/01/2025 Preface: The Real-time Transport Protocol (RTP) is an application-layer protocol, typically used over UDP, that facilitates the real-time transmission of media like audio and video over IP networks. While not a component of the modem’s RF (Radio Frequency) system itself, which handles the wireless signal, RTP works with 5G…
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CVE-2025-49521: Red Hat Ansible Automation Platform 2.5 Product Security and Bug Fix Update (1st July 2025)
Preface: Ansible Automation Platform is a broader enterprise automation platform designed to manage and automate various IT operations, including infrastructure, cloud, networking, and security. While it can be used for automating web server deployments and configurations. Besides, web hosting service providers can and often do use the Ansible Automation Platform for automating various tasks related…
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CVE-2025-0091: Block the content scheme intent in AccountTypePreferenceLoader (3rd Feb 2025)
Preface: As of January 2025, Android holds a global market share of 72.15%, which is a big jump from just 12% back in 2010. Background: The AccountTypePreferenceLoader is a class within the Android Settings app. It is responsible for loading and displaying account preferences, which include settings related to authenticator apps. This class plays a…
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Bye! 2024.
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CVE-2023-52910 – iommu/iova: Fix alloc iova overflows issue (21-08-2024)
Preface: Modern hardware provides an I/O memory management unit (IOMMU) that mediates direct memory accesses (DMAs) by I/O devices in the same way that a processor’s MMU mediates memory accesses by instructions. Background: With IOMMU, when the device performs DMA access to memory, the system returns to the device driver no longer a physical address,…